cpldfit: version P.49d Xilinx Inc. Fitter Report Design Name: usbexi Date: 10-26-2014, 5:47PM Device Used: XC9572XL-10-VQ44 Fitting Status: Successful ************************* Mapped Resource Summary ************************** Macrocells Product Terms Function Block Registers Pins Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot 49 /72 ( 68%) 191 /360 ( 53%) 91 /216 ( 42%) 42 /72 ( 58%) 18 /34 ( 53%) ** Function Block Resources ** Function Mcells FB Inps Pterms IO Block Used/Tot Used/Tot Used/Tot Used/Tot FB1 18/18* 21/54 60/90 6/ 9 FB2 3/18 29/54 33/90 6/ 9 FB3 18/18* 25/54 70/90 5/ 9 FB4 10/18 16/54 28/90 1/ 7 ----- ----- ----- ----- 49/72 91/216 191/360 18/34 * - Resource is exhausted ** Global Control Resources ** Global clock net(s) unused. Global output enable net(s) unused. Global set/reset net(s) unused. ** Pin Resources ** Signal Type Required Mapped | Pin Type Used Total ------------------------------------|------------------------------------ Input : 6 6 | I/O : 18 28 Output : 4 4 | GCK/IO : 0 3 Bidirectional : 8 8 | GTS/IO : 0 2 GCK : 0 0 | GSR/IO : 0 1 GTS : 0 0 | GSR : 0 0 | ---- ---- Total 18 18 ** Power Data ** There are 49 macrocells in high performance mode (MCHP). There are 0 macrocells in low power mode (MCLP). End of Mapped Resource Summary ************************** Errors and Warnings *************************** WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'usbexi.ise'. ************************* Summary of Mapped Logic ************************ ** 12 Outputs ** Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init Name Pts Inps No. Type Use Mode Rate State usb_data<2> 4 7 FB1_2 39 I/O I/O STD FAST RESET usb_data<3> 4 7 FB1_5 40 I/O I/O STD FAST RESET usb_data<4> 4 7 FB1_6 41 I/O I/O STD FAST RESET usb_data<5> 4 7 FB1_8 42 I/O I/O STD FAST RESET usb_data<6> 4 7 FB1_15 2 I/O I/O STD FAST RESET usb_data<7> 4 7 FB1_17 3 I/O I/O STD FAST RESET exi_do 25 26 FB2_6 31 I/O O STD FAST RESET usb_data<0> 4 7 FB2_15 37 I/O I/O STD FAST RESET usb_data<1> 4 7 FB2_17 38 I/O I/O STD FAST RESET usb_rd 5 12 FB3_2 5 I/O O STD FAST RESET usb_wr 4 5 FB3_5 6 I/O O STD FAST RESET led 1 2 FB4_11 22 I/O O STD FAST ** 37 Buried Nodes ** Signal Total Total Loc Pwr Reg Init Name Pts Inps Mode State exi_read_buffer<6>/exi_read_buffer<6>_CE 1 4 FB1_1 STD exi_read_buffer<5>/exi_read_buffer<5>_CE 1 4 FB1_3 STD Mtridata_usb_data<5>/Mtridata_usb_data<5>_CE 1 4 FB1_4 STD exi_count<3> 3 5 FB1_7 STD RESET exi_count<2> 3 4 FB1_9 STD RESET exi_count<1> 3 3 FB1_10 STD RESET exi_usb_data_in<2> 4 5 FB1_11 STD RESET exi_usb_data_in<1> 4 5 FB1_12 STD RESET exi_usb_data_in<0> 4 5 FB1_13 STD RESET exi_read_buffer<7> 4 7 FB1_14 STD RESET exi_read_buffer<6> 4 7 FB1_16 STD RESET exi_read_buffer<5> 4 7 FB1_18 STD RESET BUF_id_mode_set 2 9 FB3_1 STD usb_read_mode_set 3 9 FB3_3 STD RESET usb_write_mode_set 4 13 FB3_4 STD RESET usb_tx_status_set 4 13 FB3_6 STD RESET usb_rx_status_set 4 13 FB3_7 STD RESET led_state 4 12 FB3_8 STD RESET exi_read_buffer<4> 4 7 FB3_9 STD RESET exi_read_buffer<3> 4 7 FB3_10 STD RESET exi_read_buffer<2> 4 7 FB3_11 STD RESET exi_read_buffer<1> 4 7 FB3_12 STD RESET exi_read_buffer<0> 4 7 FB3_13 STD RESET exi_cmd<3> 4 7 FB3_14 STD RESET exi_cmd<2> 4 7 FB3_15 STD RESET exi_cmd<1> 4 7 FB3_16 STD RESET exi_cmd<0> 4 7 FB3_17 STD RESET Mtrien_usb_data 4 7 FB3_18 STD RESET usb_write_mode_set/usb_write_mode_set_RSTF 1 2 FB4_9 STD $OpTx$FX_DC$26 1 3 FB4_10 STD exi_count<0> 2 2 FB4_12 STD RESET id_mode_set 3 3 FB4_13 STD RESET exi_usb_data_in<7> 4 5 FB4_14 STD RESET exi_usb_data_in<6> 4 5 FB4_15 STD RESET exi_usb_data_in<5> 4 5 FB4_16 STD RESET exi_usb_data_in<4> 4 5 FB4_17 STD RESET exi_usb_data_in<3> 4 5 FB4_18 STD RESET ** 6 Inputs ** Signal Loc Pin Pin Pin Name No. Type Use exi_clk FB2_2 29 I/O I exi_cs FB2_5 30 I/O I exi_di FB2_8 32 I/O I usb_txe FB3_8 7 I/O I usb_rxf FB3_9 8 I/O I usb_pwren FB3_11 12 I/O I Legend: Pin No. - ~ - User Assigned ************************** Function Block Details ************************ Legend: Total Pt - Total product terms used by the macrocell signal Imp Pt - Product terms imported from other macrocells Exp Pt - Product terms exported to other macrocells in direction shown Unused Pt - Unused local product terms remaining in macrocell Loc - Location where logic was mapped in device Pin Type/Use - I - Input GCK - Global Clock O - Output GTS - Global Output Enable (b) - Buried macrocell GSR - Global Set/Reset X - Signal used as input to the macrocell logic. Pin No. - ~ - User Assigned *********************************** FB1 *********************************** Number of function block inputs used/remaining: 21/33 Number of signals used by logic mapping into function block: 21 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use exi_read_buffer<6>/exi_read_buffer<6>_CE 1 0 0 4 FB1_1 (b) (b) usb_data<2> 4 0 0 1 FB1_2 39 I/O I/O exi_read_buffer<5>/exi_read_buffer<5>_CE 1 0 0 4 FB1_3 (b) (b) Mtridata_usb_data<5>/Mtridata_usb_data<5>_CE 1 0 0 4 FB1_4 (b) (b) usb_data<3> 4 0 0 1 FB1_5 40 I/O I/O usb_data<4> 4 0 0 1 FB1_6 41 I/O I/O exi_count<3> 3 0 0 2 FB1_7 (b) (b) usb_data<5> 4 0 0 1 FB1_8 42 I/O I/O exi_count<2> 3 0 0 2 FB1_9 43 GCK/I/O (b) exi_count<1> 3 0 0 2 FB1_10 (b) (b) exi_usb_data_in<2> 4 0 0 1 FB1_11 44 GCK/I/O (b) exi_usb_data_in<1> 4 0 0 1 FB1_12 (b) (b) exi_usb_data_in<0> 4 0 0 1 FB1_13 (b) (b) exi_read_buffer<7> 4 0 0 1 FB1_14 1 GCK/I/O (b) usb_data<6> 4 0 0 1 FB1_15 2 I/O I/O exi_read_buffer<6> 4 0 0 1 FB1_16 (b) (b) usb_data<7> 4 0 0 1 FB1_17 3 I/O I/O exi_read_buffer<5> 4 0 0 1 FB1_18 (b) (b) Signals Used by Logic in Function Block 1: Mtrien_usb_data 8: exi_count<2> 15: exi_read_buffer<5>/exi_read_buffer<5>_CE 2: usb_data<2>.PIN 9: exi_count<3> 16: exi_read_buffer<6> 3: usb_data<1>.PIN 10: exi_di 17: exi_read_buffer<6>/exi_read_buffer<6>_CE 4: usb_data<0>.PIN 11: exi_read_buffer<2> 18: exi_read_buffer<7> 5: exi_clk 12: exi_read_buffer<3> 19: usb_read_mode_set 6: exi_count<0> 13: exi_read_buffer<4> 20: usb_write_mode_set 7: exi_count<1> 14: exi_read_buffer<5> 21: usb_write_mode_set/usb_write_mode_set_RSTF Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs exi_read_buffer<6>/exi_read_buffer<6>_CE .....XXXX............................... 4 usb_data<2> X...XX.XX.X........X.................... 7 exi_read_buffer<5>/exi_read_buffer<5>_CE .....XXXX............................... 4 Mtridata_usb_data<5>/Mtridata_usb_data<5>_CE .....X.XX..........X.................... 4 usb_data<3> X...XX.XX..X.......X.................... 7 usb_data<4> X...XX.XX...X......X.................... 7 exi_count<3> ....XXXX............X................... 5 usb_data<5> X...XX.XX....X.....X.................... 7 exi_count<2> ....XXX.............X................... 4 exi_count<1> ....XX..............X................... 3 exi_usb_data_in<2> .X..X...........X.X.X................... 5 exi_usb_data_in<1> ..X.X...........X.X.X................... 5 exi_usb_data_in<0> ...XX...........X.X.X................... 5 exi_read_buffer<7> ....XX.XXX....X.....X................... 7 usb_data<6> X...XX.XX......X...X.................... 7 exi_read_buffer<6> ....XXXXXX..........X................... 7 usb_data<7> X...XX.XX........X.X.................... 7 exi_read_buffer<5> ....XXXXXX..........X................... 7 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB2 *********************************** Number of function block inputs used/remaining: 29/25 Number of signals used by logic mapping into function block: 29 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 0 5 FB2_1 (b) (unused) 0 0 0 5 FB2_2 29 I/O I (unused) 0 0 0 5 FB2_3 (b) (unused) 0 0 \/5 0 FB2_4 (b) (b) (unused) 0 0 \/5 0 FB2_5 30 I/O I exi_do 25 20<- 0 0 FB2_6 31 I/O O (unused) 0 0 /\5 0 FB2_7 (b) (b) (unused) 0 0 /\5 0 FB2_8 32 I/O I (unused) 0 0 0 5 FB2_9 33 GSR/I/O (unused) 0 0 0 5 FB2_10 (b) (unused) 0 0 0 5 FB2_11 34 GTS/I/O (unused) 0 0 0 5 FB2_12 (b) (unused) 0 0 0 5 FB2_13 (b) (unused) 0 0 0 5 FB2_14 36 GTS/I/O usb_data<0> 4 0 0 1 FB2_15 37 I/O I/O (unused) 0 0 0 5 FB2_16 (b) usb_data<1> 4 0 0 1 FB2_17 38 I/O I/O (unused) 0 0 0 5 FB2_18 (b) Signals Used by Logic in Function Block 1: BUF_id_mode_set 11: exi_count<3> 21: exi_usb_data_in<6> 2: Mtrien_usb_data 12: exi_do 22: exi_usb_data_in<7> 3: exi_clk 13: exi_read_buffer<0> 23: usb_read_mode_set 4: exi_cmd<0> 14: exi_read_buffer<1> 24: usb_rx_status_set 5: exi_cmd<1> 15: exi_usb_data_in<0> 25: usb_rxf 6: exi_cmd<2> 16: exi_usb_data_in<1> 26: usb_tx_status_set 7: exi_cmd<3> 17: exi_usb_data_in<2> 27: usb_txe 8: exi_count<0> 18: exi_usb_data_in<3> 28: usb_write_mode_set 9: exi_count<1> 19: exi_usb_data_in<4> 29: usb_write_mode_set/usb_write_mode_set_RSTF 10: exi_count<2> 20: exi_usb_data_in<5> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs exi_do X.XXXXXXXXXX..XXXXXXXXXXXXXXX........... 26 usb_data<0> .XX....X.XX.X..............X............ 7 usb_data<1> .XX....X.XX..X.............X............ 7 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB3 *********************************** Number of function block inputs used/remaining: 25/29 Number of signals used by logic mapping into function block: 25 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use BUF_id_mode_set 2 0 0 3 FB3_1 (b) (b) usb_rd 5 0 0 0 FB3_2 5 I/O O usb_read_mode_set 3 0 0 2 FB3_3 (b) (b) usb_write_mode_set 4 0 0 1 FB3_4 (b) (b) usb_wr 4 0 0 1 FB3_5 6 I/O O usb_tx_status_set 4 0 0 1 FB3_6 (b) (b) usb_rx_status_set 4 0 0 1 FB3_7 (b) (b) led_state 4 0 0 1 FB3_8 7 I/O I exi_read_buffer<4> 4 0 0 1 FB3_9 8 I/O I exi_read_buffer<3> 4 0 0 1 FB3_10 (b) (b) exi_read_buffer<2> 4 0 0 1 FB3_11 12 I/O I exi_read_buffer<1> 4 0 0 1 FB3_12 (b) (b) exi_read_buffer<0> 4 0 0 1 FB3_13 (b) (b) exi_cmd<3> 4 0 0 1 FB3_14 13 I/O (b) exi_cmd<2> 4 0 0 1 FB3_15 14 I/O (b) exi_cmd<1> 4 0 0 1 FB3_16 18 I/O (b) exi_cmd<0> 4 0 0 1 FB3_17 16 I/O (b) Mtrien_usb_data 4 0 0 1 FB3_18 (b) (b) Signals Used by Logic in Function Block 1: $OpTx$FX_DC$26 10: exi_count<2> 18: usb_read_mode_set 2: Mtridata_usb_data<5>/Mtridata_usb_data<5>_CE 11: exi_count<3> 19: usb_rx_status_set 3: exi_clk 12: exi_di 20: usb_rxf 4: exi_cmd<0> 13: exi_read_buffer<5>/exi_read_buffer<5>_CE 21: usb_tx_status_set 5: exi_cmd<1> 14: exi_read_buffer<6>/exi_read_buffer<6>_CE 22: usb_txe 6: exi_cmd<2> 15: id_mode_set 23: usb_wr 7: exi_cmd<3> 16: led_state 24: usb_write_mode_set 8: exi_count<0> 17: usb_rd 25: usb_write_mode_set/usb_write_mode_set_RSTF 9: exi_count<1> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs BUF_id_mode_set ...XXXXXXXX...X......................... 9 usb_rd X.X.X..XXXX.X...XX.X....X............... 12 usb_read_mode_set X.X.X..XXXX........X....X............... 9 usb_write_mode_set .XXXXXXXXXX..........X.XX............... 13 usb_wr .XX.....X.............X.X............... 5 usb_tx_status_set ..XXXXXX.XX.XX......XX..X............... 13 usb_rx_status_set ..XXXXXX.XX.XX....XX....X............... 13 led_state X.XXXXX.XXX..X.X........X............... 12 exi_read_buffer<4> ..X....XXXXX............X............... 7 exi_read_buffer<3> ..X....XXXXX............X............... 7 exi_read_buffer<2> ..X....XXXXX............X............... 7 exi_read_buffer<1> ..X....XXXXX............X............... 7 exi_read_buffer<0> ..X....XXXXX............X............... 7 exi_cmd<3> ..X....XXXXX............X............... 7 exi_cmd<2> ..X....XXXXX............X............... 7 exi_cmd<1> ..X....XXXXX............X............... 7 exi_cmd<0> ..X....XXXXX............X............... 7 Mtrien_usb_data ..X....XXXX............XX............... 7 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB4 *********************************** Number of function block inputs used/remaining: 16/38 Number of signals used by logic mapping into function block: 16 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 0 5 FB4_1 (b) (unused) 0 0 0 5 FB4_2 19 I/O (unused) 0 0 0 5 FB4_3 (b) (unused) 0 0 0 5 FB4_4 (b) (unused) 0 0 0 5 FB4_5 20 I/O (unused) 0 0 0 5 FB4_6 (b) (unused) 0 0 0 5 FB4_7 (b) (unused) 0 0 0 5 FB4_8 21 I/O usb_write_mode_set/usb_write_mode_set_RSTF 1 0 0 4 FB4_9 (b) (b) $OpTx$FX_DC$26 1 0 0 4 FB4_10 (b) (b) led 1 0 0 4 FB4_11 22 I/O O exi_count<0> 2 0 0 3 FB4_12 (b) (b) id_mode_set 3 0 0 2 FB4_13 (b) (b) exi_usb_data_in<7> 4 0 0 1 FB4_14 23 I/O (b) exi_usb_data_in<6> 4 0 0 1 FB4_15 27 I/O (b) exi_usb_data_in<5> 4 0 0 1 FB4_16 (b) (b) exi_usb_data_in<4> 4 0 0 1 FB4_17 28 I/O (b) exi_usb_data_in<3> 4 0 0 1 FB4_18 (b) (b) Signals Used by Logic in Function Block 1: BUF_id_mode_set 7: exi_clk 12: exi_read_buffer<6>/exi_read_buffer<6>_CE 2: usb_data<7>.PIN 8: exi_cmd<0> 13: led_state 3: usb_data<6>.PIN 9: exi_cmd<2> 14: usb_pwren 4: usb_data<5>.PIN 10: exi_cmd<3> 15: usb_read_mode_set 5: usb_data<4>.PIN 11: exi_cs 16: usb_write_mode_set/usb_write_mode_set_RSTF 6: usb_data<3>.PIN Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs usb_write_mode_set/usb_write_mode_set_RSTF ..........X..X.......................... 2 $OpTx$FX_DC$26 .......XXX.............................. 3 led ............XX.......................... 2 exi_count<0> ......X........X........................ 2 id_mode_set X.....X........X........................ 3 exi_usb_data_in<7> .X....X....X..XX........................ 5 exi_usb_data_in<6> ..X...X....X..XX........................ 5 exi_usb_data_in<5> ...X..X....X..XX........................ 5 exi_usb_data_in<4> ....X.X....X..XX........................ 5 exi_usb_data_in<3> .....XX....X..XX........................ 5 0----+----1----+----2----+----3----+----4 0 0 0 0 ******************************* Equations ******************************** ********** Mapped Logic ********** $OpTx$FX_DC$26 <= (NOT exi_cmd(0) AND NOT exi_cmd(2) AND exi_cmd(3)); BUF_id_mode_set <= ((id_mode_set) OR (exi_cmd(0) AND NOT exi_cmd(2) AND NOT exi_cmd(1) AND exi_cmd(3) AND exi_count(2) AND NOT exi_count(1) AND NOT exi_count(0) AND NOT exi_count(3))); Mtridata_usb_data(5)/Mtridata_usb_data(5)_CE <= (exi_count(2) AND NOT exi_count(0) AND exi_count(3) AND usb_write_mode_set); FDCPE_Mtrien_usb_data: FDCPE port map (Mtrien_usb_data,Mtrien_usb_data_D,exi_clk,'0',NOT usb_write_mode_set/usb_write_mode_set_RSTF,Mtrien_usb_data_CE); Mtrien_usb_data_D <= (exi_count(2) AND NOT exi_count(1) AND NOT exi_count(0) AND exi_count(3)); Mtrien_usb_data_CE <= (exi_count(2) AND NOT exi_count(0) AND exi_count(3) AND usb_write_mode_set); FDCPE_exi_cmd0: FDCPE port map (exi_cmd(0),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_cmd_CE(0)); exi_cmd_CE(0) <= (NOT exi_count(2) AND exi_count(1) AND exi_count(0) AND NOT exi_count(3)); FDCPE_exi_cmd1: FDCPE port map (exi_cmd(1),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_cmd_CE(1)); exi_cmd_CE(1) <= (NOT exi_count(2) AND exi_count(1) AND NOT exi_count(0) AND NOT exi_count(3)); FDCPE_exi_cmd2: FDCPE port map (exi_cmd(2),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_cmd_CE(2)); exi_cmd_CE(2) <= (NOT exi_count(2) AND NOT exi_count(1) AND exi_count(0) AND NOT exi_count(3)); FDCPE_exi_cmd3: FDCPE port map (exi_cmd(3),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_cmd_CE(3)); exi_cmd_CE(3) <= (NOT exi_count(2) AND NOT exi_count(1) AND NOT exi_count(0) AND NOT exi_count(3)); FTCPE_exi_count0: FTCPE port map (exi_count(0),'1',exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0'); FTCPE_exi_count1: FTCPE port map (exi_count(1),exi_count(0),exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0'); FTCPE_exi_count2: FTCPE port map (exi_count(2),exi_count_T(2),exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0'); exi_count_T(2) <= (exi_count(1) AND exi_count(0)); FTCPE_exi_count3: FTCPE port map (exi_count(3),exi_count_T(3),exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0'); exi_count_T(3) <= (exi_count(2) AND exi_count(1) AND exi_count(0)); FDCPE_exi_do: FDCPE port map (exi_do,exi_do_D,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0'); exi_do_D <= ((EXP6_.EXP) OR (exi_do AND NOT exi_count(0) AND exi_count(3) AND NOT usb_read_mode_set) OR (exi_do AND exi_count(2) AND exi_count(1) AND exi_count(0) AND exi_count(3)) OR (exi_do AND exi_count(2) AND NOT exi_count(1) AND NOT exi_count(0) AND NOT usb_read_mode_set) OR (exi_do AND NOT exi_count(2) AND exi_count(1) AND exi_count(0) AND NOT exi_count(3)) OR (exi_do AND exi_count(1) AND exi_count(0) AND NOT usb_read_mode_set AND NOT BUF_id_mode_set) OR (EXP9_.EXP) OR (exi_usb_data_in(0) AND exi_count(2) AND exi_count(1) AND NOT exi_count(0) AND exi_count(3) AND usb_read_mode_set) OR (exi_usb_data_in(1) AND exi_count(2) AND NOT exi_count(1) AND exi_count(0) AND exi_count(3) AND usb_read_mode_set) OR (exi_usb_data_in(2) AND exi_count(2) AND NOT exi_count(1) AND NOT exi_count(0) AND exi_count(3) AND usb_read_mode_set) OR (exi_usb_data_in(5) AND NOT exi_count(2) AND NOT exi_count(1) AND exi_count(0) AND exi_count(3) AND usb_read_mode_set) OR (exi_do AND exi_count(2) AND exi_count(1) AND NOT exi_count(0) AND NOT exi_count(3) AND NOT BUF_id_mode_set) OR (exi_do AND NOT exi_count(1) AND exi_count(3) AND NOT usb_read_mode_set) OR (NOT exi_count(2) AND NOT exi_count(1) AND exi_count(3) AND BUF_id_mode_set) OR (NOT exi_count(2) AND NOT exi_count(0) AND exi_count(3) AND BUF_id_mode_set)); FDCPE_exi_read_buffer0: FDCPE port map (exi_read_buffer(0),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_read_buffer_CE(0)); exi_read_buffer_CE(0) <= (NOT exi_count(2) AND exi_count(1) AND exi_count(0) AND exi_count(3)); FDCPE_exi_read_buffer1: FDCPE port map (exi_read_buffer(1),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_read_buffer_CE(1)); exi_read_buffer_CE(1) <= (NOT exi_count(2) AND exi_count(1) AND NOT exi_count(0) AND exi_count(3)); FDCPE_exi_read_buffer2: FDCPE port map (exi_read_buffer(2),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_read_buffer_CE(2)); exi_read_buffer_CE(2) <= (NOT exi_count(2) AND NOT exi_count(1) AND exi_count(0) AND exi_count(3)); FDCPE_exi_read_buffer3: FDCPE port map (exi_read_buffer(3),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_read_buffer_CE(3)); exi_read_buffer_CE(3) <= (NOT exi_count(2) AND NOT exi_count(1) AND NOT exi_count(0) AND exi_count(3)); FDCPE_exi_read_buffer4: FDCPE port map (exi_read_buffer(4),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_read_buffer_CE(4)); exi_read_buffer_CE(4) <= (exi_count(2) AND exi_count(1) AND exi_count(0) AND NOT exi_count(3)); exi_read_buffer(5)/exi_read_buffer(5)_CE <= (exi_count(2) AND exi_count(1) AND NOT exi_count(0) AND NOT exi_count(3)); FDCPE_exi_read_buffer5: FDCPE port map (exi_read_buffer(5),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_read_buffer_CE(5)); exi_read_buffer_CE(5) <= (exi_count(2) AND exi_count(1) AND NOT exi_count(0) AND NOT exi_count(3)); exi_read_buffer(6)/exi_read_buffer(6)_CE <= (exi_count(2) AND NOT exi_count(1) AND exi_count(0) AND NOT exi_count(3)); FDCPE_exi_read_buffer6: FDCPE port map (exi_read_buffer(6),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_read_buffer_CE(6)); exi_read_buffer_CE(6) <= (exi_count(2) AND NOT exi_count(1) AND exi_count(0) AND NOT exi_count(3)); FDCPE_exi_read_buffer7: FDCPE port map (exi_read_buffer(7),exi_di,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_read_buffer_CE(7)); exi_read_buffer_CE(7) <= (exi_count(2) AND NOT exi_count(0) AND NOT exi_count(3) AND NOT exi_read_buffer(5)/exi_read_buffer(5)_CE); FDCPE_exi_usb_data_in0: FDCPE port map (exi_usb_data_in(0),usb_data(0).PIN,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_usb_data_in_CE(0)); exi_usb_data_in_CE(0) <= (usb_read_mode_set AND exi_read_buffer(6)/exi_read_buffer(6)_CE); FDCPE_exi_usb_data_in1: FDCPE port map (exi_usb_data_in(1),usb_data(1).PIN,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_usb_data_in_CE(1)); exi_usb_data_in_CE(1) <= (usb_read_mode_set AND exi_read_buffer(6)/exi_read_buffer(6)_CE); FDCPE_exi_usb_data_in2: FDCPE port map (exi_usb_data_in(2),usb_data(2).PIN,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_usb_data_in_CE(2)); exi_usb_data_in_CE(2) <= (usb_read_mode_set AND exi_read_buffer(6)/exi_read_buffer(6)_CE); FDCPE_exi_usb_data_in3: FDCPE port map (exi_usb_data_in(3),usb_data(3).PIN,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_usb_data_in_CE(3)); exi_usb_data_in_CE(3) <= (usb_read_mode_set AND exi_read_buffer(6)/exi_read_buffer(6)_CE); FDCPE_exi_usb_data_in4: FDCPE port map (exi_usb_data_in(4),usb_data(4).PIN,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_usb_data_in_CE(4)); exi_usb_data_in_CE(4) <= (usb_read_mode_set AND exi_read_buffer(6)/exi_read_buffer(6)_CE); FDCPE_exi_usb_data_in5: FDCPE port map (exi_usb_data_in(5),usb_data(5).PIN,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_usb_data_in_CE(5)); exi_usb_data_in_CE(5) <= (usb_read_mode_set AND exi_read_buffer(6)/exi_read_buffer(6)_CE); FDCPE_exi_usb_data_in6: FDCPE port map (exi_usb_data_in(6),usb_data(6).PIN,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_usb_data_in_CE(6)); exi_usb_data_in_CE(6) <= (usb_read_mode_set AND exi_read_buffer(6)/exi_read_buffer(6)_CE); FDCPE_exi_usb_data_in7: FDCPE port map (exi_usb_data_in(7),usb_data(7).PIN,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',exi_usb_data_in_CE(7)); exi_usb_data_in_CE(7) <= (usb_read_mode_set AND exi_read_buffer(6)/exi_read_buffer(6)_CE); FDCPE_id_mode_set: FDCPE port map (id_mode_set,BUF_id_mode_set,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0'); led <= NOT ((NOT led_state AND NOT usb_pwren)); FTCPE_led_state: FTCPE port map (led_state,led_state_T,exi_clk,'0','0',led_state_CE); led_state_T <= ((NOT exi_cmd(1) AND led_state AND $OpTx$FX_DC$26) OR (exi_cmd(0) AND exi_cmd(2) AND exi_cmd(1) AND NOT exi_cmd(3) AND NOT led_state)); led_state_CE <= (exi_count(2) AND NOT exi_count(1) AND NOT exi_count(3) AND usb_write_mode_set/usb_write_mode_set_RSTF AND NOT exi_read_buffer(6)/exi_read_buffer(6)_CE); FDCPE_usb_data0: FDCPE port map (usb_data_I(0),exi_read_buffer(0),exi_clk,'0','0',usb_data_CE(0)); usb_data_CE(0) <= (exi_count(2) AND NOT exi_count(0) AND exi_count(3) AND usb_write_mode_set); usb_data(0) <= usb_data_I(0) when usb_data_OE(0) = '1' else 'Z'; usb_data_OE(0) <= NOT Mtrien_usb_data; FDCPE_usb_data1: FDCPE port map (usb_data_I(1),exi_read_buffer(1),exi_clk,'0','0',usb_data_CE(1)); usb_data_CE(1) <= (exi_count(2) AND NOT exi_count(0) AND exi_count(3) AND usb_write_mode_set); usb_data(1) <= usb_data_I(1) when usb_data_OE(1) = '1' else 'Z'; usb_data_OE(1) <= NOT Mtrien_usb_data; FDCPE_usb_data2: FDCPE port map (usb_data_I(2),exi_read_buffer(2),exi_clk,'0','0',usb_data_CE(2)); usb_data_CE(2) <= (exi_count(2) AND NOT exi_count(0) AND exi_count(3) AND usb_write_mode_set); usb_data(2) <= usb_data_I(2) when usb_data_OE(2) = '1' else 'Z'; usb_data_OE(2) <= NOT Mtrien_usb_data; FDCPE_usb_data3: FDCPE port map (usb_data_I(3),exi_read_buffer(3),exi_clk,'0','0',usb_data_CE(3)); usb_data_CE(3) <= (exi_count(2) AND NOT exi_count(0) AND exi_count(3) AND usb_write_mode_set); usb_data(3) <= usb_data_I(3) when usb_data_OE(3) = '1' else 'Z'; usb_data_OE(3) <= NOT Mtrien_usb_data; FDCPE_usb_data4: FDCPE port map (usb_data_I(4),exi_read_buffer(4),exi_clk,'0','0',usb_data_CE(4)); usb_data_CE(4) <= (exi_count(2) AND NOT exi_count(0) AND exi_count(3) AND usb_write_mode_set); usb_data(4) <= usb_data_I(4) when usb_data_OE(4) = '1' else 'Z'; usb_data_OE(4) <= NOT Mtrien_usb_data; FDCPE_usb_data5: FDCPE port map (usb_data_I(5),exi_read_buffer(5),exi_clk,'0','0',usb_data_CE(5)); usb_data_CE(5) <= (exi_count(2) AND NOT exi_count(0) AND exi_count(3) AND usb_write_mode_set); usb_data(5) <= usb_data_I(5) when usb_data_OE(5) = '1' else 'Z'; usb_data_OE(5) <= NOT Mtrien_usb_data; FDCPE_usb_data6: FDCPE port map (usb_data_I(6),exi_read_buffer(6),exi_clk,'0','0',usb_data_CE(6)); usb_data_CE(6) <= (exi_count(2) AND NOT exi_count(0) AND exi_count(3) AND usb_write_mode_set); usb_data(6) <= usb_data_I(6) when usb_data_OE(6) = '1' else 'Z'; usb_data_OE(6) <= NOT Mtrien_usb_data; FDCPE_usb_data7: FDCPE port map (usb_data_I(7),exi_read_buffer(7),exi_clk,'0','0',usb_data_CE(7)); usb_data_CE(7) <= (exi_count(2) AND NOT exi_count(0) AND exi_count(3) AND usb_write_mode_set); usb_data(7) <= usb_data_I(7) when usb_data_OE(7) = '1' else 'Z'; usb_data_OE(7) <= NOT Mtrien_usb_data; FTCPE_usb_rd: FTCPE port map (usb_rd,usb_rd_T,exi_clk,'0',NOT usb_write_mode_set/usb_write_mode_set_RSTF); usb_rd_T <= ((NOT usb_rd AND usb_read_mode_set AND exi_read_buffer(5)/exi_read_buffer(5)_CE) OR (exi_cmd(1) AND usb_rd AND NOT exi_count(2) AND exi_count(1) AND exi_count(0) AND NOT exi_count(3) AND NOT usb_read_mode_set AND NOT usb_rxf AND $OpTx$FX_DC$26) OR (exi_cmd(1) AND usb_rd AND NOT exi_count(2) AND exi_count(1) AND exi_count(0) AND NOT exi_count(3) AND NOT usb_rxf AND NOT exi_read_buffer(5)/exi_read_buffer(5)_CE AND $OpTx$FX_DC$26)); FDCPE_usb_read_mode_set: FDCPE port map (usb_read_mode_set,'1',exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0',usb_read_mode_set_CE); usb_read_mode_set_CE <= (exi_cmd(1) AND NOT exi_count(2) AND exi_count(1) AND exi_count(0) AND NOT exi_count(3) AND NOT usb_rxf AND $OpTx$FX_DC$26); FDCPE_usb_rx_status_set: FDCPE port map (usb_rx_status_set,usb_rx_status_set_D,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0'); usb_rx_status_set_D <= ((usb_rx_status_set AND NOT exi_read_buffer(6)/exi_read_buffer(6)_CE) OR (exi_cmd(0) AND exi_cmd(2) AND NOT exi_cmd(1) AND exi_cmd(3) AND exi_count(2) AND NOT exi_count(0) AND NOT exi_count(3) AND NOT usb_rxf AND NOT exi_read_buffer(5)/exi_read_buffer(5)_CE)); FDCPE_usb_tx_status_set: FDCPE port map (usb_tx_status_set,usb_tx_status_set_D,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0'); usb_tx_status_set_D <= ((usb_tx_status_set AND NOT exi_read_buffer(6)/exi_read_buffer(6)_CE) OR (NOT exi_cmd(0) AND exi_cmd(2) AND NOT exi_cmd(1) AND exi_cmd(3) AND exi_count(2) AND NOT exi_count(0) AND NOT exi_count(3) AND NOT usb_txe AND NOT exi_read_buffer(5)/exi_read_buffer(5)_CE)); FDCPE_usb_wr: FDCPE port map (usb_wr,usb_wr_D,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0'); usb_wr_D <= ((usb_wr AND NOT Mtridata_usb_data(5)/Mtridata_usb_data(5)_CE) OR (NOT exi_count(1) AND Mtridata_usb_data(5)/Mtridata_usb_data(5)_CE)); FTCPE_usb_write_mode_set: FTCPE port map (usb_write_mode_set,usb_write_mode_set_T,exi_clk,NOT usb_write_mode_set/usb_write_mode_set_RSTF,'0'); usb_write_mode_set_T <= ((exi_count(1) AND usb_write_mode_set AND Mtridata_usb_data(5)/Mtridata_usb_data(5)_CE) OR (exi_cmd(0) AND NOT exi_cmd(2) AND exi_cmd(1) AND exi_cmd(3) AND exi_count(2) AND NOT exi_count(1) AND NOT exi_count(0) AND NOT exi_count(3) AND NOT usb_write_mode_set AND NOT usb_txe)); usb_write_mode_set/usb_write_mode_set_RSTF <= (NOT usb_pwren AND NOT exi_cs); Register Legend: FDCPE (Q,D,C,CLR,PRE,CE); FTCPE (Q,D,C,CLR,PRE,CE); LDCP (Q,D,G,CLR,PRE); ****************************** Device Pin Out ***************************** Device : XC9572XL-10-VQ44 -------------------------------- /44 43 42 41 40 39 38 37 36 35 34 \ | 1 33 | | 2 32 | | 3 31 | | 4 30 | | 5 XC9572XL-10-VQ44 29 | | 6 28 | | 7 27 | | 8 26 | | 9 25 | | 10 24 | | 11 23 | \ 12 13 14 15 16 17 18 19 20 21 22 / -------------------------------- Pin Signal Pin Signal No. Name No. Name 1 PGND 23 PGND 2 usb_data<6> 24 TDO 3 usb_data<7> 25 GND 4 GND 26 VCC 5 usb_rd 27 PGND 6 usb_wr 28 PGND 7 usb_txe 29 exi_clk 8 usb_rxf 30 exi_cs 9 TDI 31 exi_do 10 TMS 32 exi_di 11 TCK 33 PGND 12 usb_pwren 34 PGND 13 PGND 35 VCC 14 PGND 36 PGND 15 VCC 37 usb_data<0> 16 PGND 38 usb_data<1> 17 GND 39 usb_data<2> 18 PGND 40 usb_data<3> 19 PGND 41 usb_data<4> 20 PGND 42 usb_data<5> 21 PGND 43 PGND 22 led 44 PGND Legend : NC = Not Connected, unbonded pin PGND = Unused I/O configured as additional Ground pin TIE = Unused I/O floating -- must tie to VCC, GND or other signal KPR = Unused I/O with weak keeper (leave unconnected) VCC = Dedicated Power Pin GND = Dedicated Ground Pin TDI = Test Data In, JTAG pin TDO = Test Data Out, JTAG pin TCK = Test Clock, JTAG pin TMS = Test Mode Select, JTAG pin PROHIBITED = User reserved pin **************************** Compiler Options **************************** Following is a list of all global compiler options used by the fitter run. Device(s) Specified : xc9572xl-10-VQ44 Optimization Method : DENSITY Multi-Level Logic Optimization : ON Ignore Timing Specifications : OFF Default Register Power Up Value : LOW Keep User Location Constraints : ON What-You-See-Is-What-You-Get : OFF Exhaustive Fitting : OFF Keep Unused Inputs : OFF Slew Rate : FAST Power Mode : STD Ground on Unused IOs : ON Set I/O Pin Termination : KEEPER Global Clock Optimization : ON Global Set/Reset Optimization : OFF Global Ouput Enable Optimization : OFF Input Limit : 54 Pterm Limit : 25