toplevel_p2xh Project Status (04/07/2015 - 00:45:48) | |||
Project File: | gcdv_update.xise | Parser Errors: | No Errors |
Module Name: | toplevel_p2xh | Implementation State: | Programming File Generated |
Target Device: | xc3s50a-4vq100 |
|
No Errors |
Product Version: | ISE 14.4 |
|
59 Warnings (0 new) |
Design Goal: | Balanced |
|
All Signals Completely Routed |
Design Strategy: | Xilinx Default (unlocked) |
|
All Constraints Met |
Environment: | System Settings |
|
0 (Timing Report) |
Device Utilization Summary | [-] | ||||
Logic Utilization | Used | Available | Utilization | Note(s) | |
Number of Slice Flip Flops | 461 | 1,408 | 32% | ||
Number of 4 input LUTs | 709 | 1,408 | 50% | ||
Number of occupied Slices | 482 | 704 | 68% | ||
Number of Slices containing only related logic | 482 | 482 | 100% | ||
Number of Slices containing unrelated logic | 0 | 482 | 0% | ||
Total Number of 4 input LUTs | 749 | 1,408 | 53% | ||
Number used as logic | 694 | ||||
Number used as a route-thru | 40 | ||||
Number used as Shift registers | 15 | ||||
Number of bonded IOBs | 19 | 68 | 27% | ||
IOB Master Pads | 4 | ||||
IOB Slave Pads | 4 | ||||
Number of ODDR2s used | 4 | ||||
Number of BUFGMUXs | 3 | 24 | 12% | ||
Number of DCMs | 1 | 2 | 50% | ||
Number of MULT18X18SIOs | 3 | 3 | 100% | ||
Average Fanout of Non-Clock Nets | 2.72 |
Performance Summary | [-] | |||
Final Timing Score: | 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) | Pinout Data: | Pinout Report | |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report | |
Timing Constraints: | All Constraints Met |
Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | Current | Tue 7. Apr 00:57:43 2015 | 0 | 56 Warnings (0 new) | 24 Infos (0 new) | |
Translation Report | Current | Tue 7. Apr 00:57:54 2015 | 0 | 0 | 4 Infos (1 new) | |
Map Report | Current | Tue 7. Apr 00:58:04 2015 | 0 | 3 Warnings (0 new) | 3 Infos (0 new) | |
Place and Route Report | Current | Tue 7. Apr 00:58:21 2015 | 0 | 0 | 0 | |
Power Report | ||||||
Post-PAR Static Timing Report | Current | Tue 7. Apr 00:58:27 2015 | 0 | 0 | 5 Infos (0 new) | |
Bitgen Report | Current | Tue 7. Apr 00:58:37 2015 | 0 | 0 | 1 Info (0 new) |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
WebTalk Report | Current | Tue 7. Apr 00:58:38 2015 | |
WebTalk Log File | Current | Tue 7. Apr 00:58:46 2015 |