Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.4 (WebPack) - P.49d Target Family: Spartan3A and Spartan3AN
OS Platform: NT64 Target Device: xc3s50a
Project ID (random number) a7c1fde7b2ab40ac897190eda6072f4f.1F9D9ED706FE4208B3A250E9E472992A.16 Target Package: vq100
Registration ID 207362003_0_0_611 Target Speed: -4
Date Generated 2015-06-24T22:43:47 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release Service Pack 1 (build 7601)
CPU Name AMD Sempron(tm) 145 Processor CPU Speed 2812 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Accumulators=4
  • 11-bit updown accumulator=1
  • 4-bit updown accumulator=3
Adders/Subtractors=58
  • 11-bit adder=1
  • 19-bit adder=9
  • 19-bit subtractor=2
  • 4-bit adder=33
  • 4-bit adder carry in=6
  • 4-bit subtractor=4
  • 9-bit adder=2
  • 9-bit subtractor=1
Comparators=18
  • 10-bit comparator equal=2
  • 10-bit comparator not equal=4
  • 11-bit comparator less=1
  • 19-bit comparator greater=3
  • 19-bit comparator less=3
  • 2-bit comparator less=1
  • 4-bit comparator greater=1
  • 5-bit comparator greater=3
Counters=5
  • 10-bit up counter=2
  • 2-bit down counter=1
  • 2-bit up counter=1
  • 8-bit down counter=1
FSMs=1 Multipliers=5
  • 8x11-bit registered multiplier=4
  • 9x11-bit multiplier=1
Registers=600
  • Flip-Flops=600
Xors=57
  • 1-bit xor2=57
MiscellaneousStatistics
  • AGG_BONDED_IO=23
  • AGG_IO=23
  • AGG_SLICE=578
  • NUM_4_INPUT_LUT=870
  • NUM_BONDED_DIFFMTB=4
  • NUM_BONDED_DIFFSTB=4
  • NUM_BONDED_IBUF=13
  • NUM_BONDED_IOB=2
  • NUM_BUFGMUX=4
  • NUM_CYMUX=280
  • NUM_DCM=2
  • NUM_LUT_RT=41
  • NUM_MULT18X18SIO=3
  • NUM_MULTAND=1
  • NUM_ODDR2_C0=8
  • NUM_SHIFT=18
  • NUM_SLICEL=564
  • NUM_SLICEM=14
  • NUM_SLICE_FF=571
  • NUM_XOR=253
NetStatistics
  • NumNets_Active=1263
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMDUMMY=110
  • NumNodesOfType_Active_CLKPIN=352
  • NumNodesOfType_Active_CNTRLPIN=334
  • NumNodesOfType_Active_DOUBLE=1372
  • NumNodesOfType_Active_DUMMY=2366
  • NumNodesOfType_Active_DUMMYBANK=29
  • NumNodesOfType_Active_DUMMYESC=13
  • NumNodesOfType_Active_GLOBAL=55
  • NumNodesOfType_Active_HFULLHEX=5
  • NumNodesOfType_Active_HLONG=3
  • NumNodesOfType_Active_HUNIHEX=28
  • NumNodesOfType_Active_INPUT=2807
  • NumNodesOfType_Active_IOBOUTPUT=13
  • NumNodesOfType_Active_OMUX=1198
  • NumNodesOfType_Active_OUTPUT=1234
  • NumNodesOfType_Active_PREBXBY=767
  • NumNodesOfType_Active_VFULLHEX=61
  • NumNodesOfType_Active_VLONG=12
  • NumNodesOfType_Active_VUNIHEX=45
  • NumNodesOfType_Gnd_BRAMDUMMY=60
  • NumNodesOfType_Gnd_CLKPIN=3
  • NumNodesOfType_Gnd_CNTRLPIN=4
  • NumNodesOfType_Gnd_DOUBLE=30
  • NumNodesOfType_Gnd_DUMMY=52
  • NumNodesOfType_Gnd_DUMMYBANK=17
  • NumNodesOfType_Gnd_INPUT=129
  • NumNodesOfType_Gnd_OMUX=49
  • NumNodesOfType_Gnd_OUTPUT=27
  • NumNodesOfType_Gnd_PREBXBY=24
  • NumNodesOfType_Gnd_VFULLHEX=1
  • NumNodesOfType_Vcc_BRAMDUMMY=10
  • NumNodesOfType_Vcc_CNTRLPIN=15
  • NumNodesOfType_Vcc_DUMMY=20
  • NumNodesOfType_Vcc_INPUT=40
  • NumNodesOfType_Vcc_PREBXBY=9
  • NumNodesOfType_Vcc_VCCOUT=33
SiteStatistics
  • IBUF-DIFFMLR=4
  • IBUF-DIFFMTB=2
  • IBUF-DIFFSI_NDT=1
  • IBUF-DIFFSLR=4
  • IBUF-DIFFSTB=1
  • IOB-DIFFMLR=1
  • IOB-DIFFSLR=1
  • SLICEL-SLICEM=256
SiteSummary
  • BUFGMUX=4
  • BUFGMUX_GCLKMUX=4
  • BUFGMUX_GCLK_BUFFER=4
  • DCM=2
  • DCM_DCM=2
  • DIFFMTB=4
  • DIFFMTB_OFF1=4
  • DIFFMTB_OFF2=4
  • DIFFMTB_OFFDDRBLACKBOX=4
  • DIFFMTB_OUTBUF=4
  • DIFFMTB_PAD=4
  • DIFFSTB=4
  • DIFFSTB_DIFFO_IN_USED=4
  • DIFFSTB_OFF1=4
  • DIFFSTB_OUTBUF=4
  • DIFFSTB_PAD=4
  • IBUF=13
  • IBUF_DELAY_ADJ_BBOX=13
  • IBUF_INBUF=13
  • IBUF_PAD=13
  • IOB=2
  • IOB_OUTBUF=2
  • IOB_PAD=2
  • MULT18X18SIO=3
  • MULT18X18SIO_MULT18X18SIO=3
  • SLICEL=564
  • SLICEL_C1VDD=19
  • SLICEL_C2VDD=9
  • SLICEL_CYMUXF=143
  • SLICEL_CYMUXG=137
  • SLICEL_F=429
  • SLICEL_F5MUX=22
  • SLICEL_F6MUX=3
  • SLICEL_FFX=269
  • SLICEL_FFY=280
  • SLICEL_G=423
  • SLICEL_GAND=1
  • SLICEL_GNDF=62
  • SLICEL_GNDG=61
  • SLICEL_VDDG=3
  • SLICEL_XORF=131
  • SLICEL_XORG=122
  • SLICEM=14
  • SLICEM_F=4
  • SLICEM_FFX=8
  • SLICEM_FFY=14
  • SLICEM_G=14
  • SLICEM_WSGEN=14
 
Configuration Data
BUFGMUX
  • S=[S_INV:4] [S:0]
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:4]
  • S=[S_INV:4] [S:0]
DCM
  • PSCLK=[PSCLK_INV:0] [PSCLK:2]
  • PSEN=[PSEN_INV:0] [PSEN:2]
  • PSINCDEC=[PSINCDEC:2] [PSINCDEC_INV:0]
  • RST=[RST:2] [RST_INV:0]
DCM_DCM
  • CLKDV_DIVIDE=[2:2]
  • CLKIN_DIVIDE_BY_2=[CLKIN_DIVIDE_BY_2:2]
  • CLKOUT_PHASE_SHIFT=[NONE:2]
  • CLK_FEEDBACK=[1X:1] [2X:1]
  • DESKEW_ADJUST=[9:2]
  • DFS_FREQUENCY_MODE=[LOW:2]
  • DLL_FREQUENCY_MODE=[LOW:2]
  • DUTY_CYCLE_CORRECTION=[TRUE:2]
  • FACTORY_JF1=[0XC0:2]
  • FACTORY_JF2=[0X80:2]
  • PSCLK=[PSCLK_INV:0] [PSCLK:2]
  • PSEN=[PSEN_INV:0] [PSEN:2]
  • PSINCDEC=[PSINCDEC:2] [PSINCDEC_INV:0]
  • RST=[RST:2] [RST_INV:0]
  • STARTUP_WAIT=[STARTUP_WAIT:2]
DIFFMTB
  • O1=[O1_INV:4] [O1:0]
  • OCE=[OCE:4] [OCE_INV:0]
  • ODDRIN2=[ODDRIN2:4] [ODDRIN2_INV:0]
  • OTCLK1=[OTCLK1_INV:0] [OTCLK1:4]
  • OTCLK2=[OTCLK2_INV:0] [OTCLK2:4]
DIFFMTB_OFF1
  • CE=[CE:4] [CE_INV:0]
  • CK=[CK:4] [CK_INV:0]
  • D=[D:0] [D_INV:4]
  • LATCH_OR_FF=[FF:4]
  • OFF1_INIT_ATTR=[INIT0:4]
DIFFMTB_OFF2
  • CE=[CE:4] [CE_INV:0]
  • CK=[CK:4] [CK_INV:0]
  • D=[D:4] [D_INV:0]
  • LATCH_OR_FF=[FF:4]
  • OFF2_INIT_ATTR=[INIT0:4]
DIFFMTB_OUTBUF
  • IN=[IN_INV:0] [IN:4]
  • SUSPEND=[3STATE:4]
DIFFMTB_PAD
  • IOATTRBOX=[TMDS_33:4]
DIFFSTB
  • O1=[O1_INV:4] [O1:0]
  • OCE=[OCE:4] [OCE_INV:0]
  • OTCLK1=[OTCLK1_INV:0] [OTCLK1:4]
DIFFSTB_OFF1
  • CE=[CE:4] [CE_INV:0]
  • CK=[CK:4] [CK_INV:0]
  • D=[D:0] [D_INV:4]
  • LATCH_OR_FF=[FF:4]
  • OFF1_INIT_ATTR=[INIT0:4]
DIFFSTB_OUTBUF
  • SUSPEND=[3STATE:4]
DIFFSTB_PAD
  • IOATTRBOX=[TMDS_33:4]
IBUF_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:13]
  • IBUF_DELAY_VALUE=[DLY0:13]
  • IFD_DELAY_VALUE=[DLY0:13]
  • SEL_IN=[SEL_IN:13] [SEL_IN_INV:0]
IBUF_PAD
  • IOATTRBOX=[LVCMOS33:13]
IOB
  • O1=[O1_INV:0] [O1:2]
IOB_OUTBUF
  • IN=[IN_INV:0] [IN:2]
  • SUSPEND=[3STATE:2]
IOB_PAD
  • DRIVEATTRBOX=[12:2]
  • IOATTRBOX=[LVCMOS33:2]
  • SLEW=[SLOW:2]
MULT18X18SIO
  • CEA=[CEA_INV:0] [CEA:3]
  • CEB=[CEB_INV:0] [CEB:3]
  • CEP=[CEP:3] [CEP_INV:0]
  • CLK=[CLK:3] [CLK_INV:0]
  • RSTA=[RSTA:3] [RSTA_INV:0]
  • RSTB=[RSTB:3] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:3]
MULT18X18SIO_MULT18X18SIO
  • AREG=[0:3]
  • BREG=[0:3]
  • B_INPUT=[DIRECT:3]
  • CEA=[CEA_INV:0] [CEA:3]
  • CEB=[CEB_INV:0] [CEB:3]
  • CEP=[CEP:3] [CEP_INV:0]
  • CLK=[CLK:3] [CLK_INV:0]
  • PREG=[0:1] [1:2]
  • PREG_CLKINVERSION=[0:3]
  • RSTA=[RSTA:3] [RSTA_INV:0]
  • RSTB=[RSTB:3] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:3]
SLICEL
  • BX=[BX_INV:4] [BX:131]
  • BY=[BY:110] [BY_INV:7]
  • CE=[CE:286] [CE_INV:0]
  • CIN=[CIN_INV:0] [CIN:130]
  • CLK=[CLK:320] [CLK_INV:0]
  • SR=[SR:23] [SR_INV:1]
SLICEL_CYMUXF
  • 0=[0:143] [0_INV:0]
  • 1=[1_INV:1] [1:142]
SLICEL_CYMUXG
  • 0=[0:134] [0_INV:0]
SLICEL_F5MUX
  • S0=[S0:22] [S0_INV:0]
SLICEL_F6MUX
  • S0=[S0:3] [S0_INV:0]
SLICEL_FFX
  • CE=[CE:241] [CE_INV:0]
  • CK=[CK:269] [CK_INV:0]
  • D=[D:266] [D_INV:3]
  • FFX_INIT_ATTR=[INIT0:248] [INIT1:21]
  • FFX_SR_ATTR=[SRLOW:268] [SRHIGH:1]
  • LATCH_OR_FF=[FF:269]
  • SR=[SR:18] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:251] [SYNC:18]
SLICEL_FFY
  • CE=[CE:251] [CE_INV:0]
  • CK=[CK:280] [CK_INV:0]
  • D=[D:273] [D_INV:7]
  • FFY_INIT_ATTR=[INIT0:259] [INIT1:21]
  • FFY_SR_ATTR=[SRLOW:279] [SRHIGH:1]
  • LATCH_OR_FF=[FF:280]
  • SR=[SR:20] [SR_INV:1]
  • SYNC_ATTR=[ASYNC:259] [SYNC:21]
SLICEL_XORF
  • 1=[1_INV:1] [1:130]
SLICEM
  • BX=[BX_INV:0] [BX:8]
  • BY=[BY:14] [BY_INV:0]
  • CE=[CE:11] [CE_INV:0]
  • CLK=[CLK:14] [CLK_INV:0]
  • SR=[SR:14] [SR_INV:0]
SLICEM_F
  • DI=[DI:4] [DI_INV:0]
  • F_ATTR=[SHIFT_REG:4]
  • LUT_OR_MEM=[RAM:4]
SLICEM_FFX
  • CE=[CE:5] [CE_INV:0]
  • CK=[CK:8] [CK_INV:0]
  • D=[D:8] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:8]
  • FFX_SR_ATTR=[SRLOW:8]
  • LATCH_OR_FF=[FF:8]
  • SYNC_ATTR=[ASYNC:8]
SLICEM_FFY
  • CE=[CE:11] [CE_INV:0]
  • CK=[CK:14] [CK_INV:0]
  • D=[D:14] [D_INV:0]
  • FFY_INIT_ATTR=[INIT0:14]
  • FFY_SR_ATTR=[SRLOW:14]
  • LATCH_OR_FF=[FF:14]
  • SYNC_ATTR=[ASYNC:14]
SLICEM_G
  • DI=[DI:14] [DI_INV:0]
  • G_ATTR=[SHIFT_REG:14]
  • LUT_OR_MEM=[RAM:14]
SLICEM_WSGEN
  • CK=[CK:14] [CK_INV:0]
  • SYNC_ATTR=[ASYNC:14]
  • WE=[WE_INV:0] [WE:14]
 
Pin Data
BUFGMUX
  • I0=4
  • O=4
  • S=4
BUFGMUX_GCLKMUX
  • I0=4
  • OUT=4
  • S=4
BUFGMUX_GCLK_BUFFER
  • IN=4
  • OUT=4
DCM
  • CLK0=1
  • CLK2X=1
  • CLKFB=2
  • CLKFX=2
  • CLKFX180=1
  • CLKIN=2
  • LOCKED=2
  • PSCLK=2
  • PSEN=2
  • PSINCDEC=2
  • RST=2
  • STATUS2=2
DCM_DCM
  • CLK0=1
  • CLK2X=1
  • CLKFB=2
  • CLKFX=2
  • CLKFX180=1
  • CLKIN=2
  • LOCKED=2
  • PSCLK=2
  • PSEN=2
  • PSINCDEC=2
  • RST=2
  • STATUS2=2
DIFFMTB
  • DIFFO_OUT=4
  • O1=4
  • OCE=4
  • ODDRIN2=4
  • OTCLK1=4
  • OTCLK2=4
  • PAD=4
DIFFMTB_OFF1
  • CE=4
  • CK=4
  • D=4
  • Q=4
DIFFMTB_OFF2
  • CE=4
  • CK=4
  • D=4
  • Q=4
DIFFMTB_OFFDDRBLACKBOX
  • OFF1=4
  • OFF2=4
  • OFFDDR=4
DIFFMTB_OUTBUF
  • IN=4
  • OUTN=4
  • OUTP=4
DIFFMTB_PAD
  • PAD=4
DIFFSTB
  • DIFFO_IN=4
  • O1=4
  • OCE=4
  • ODDROUT1=4
  • OTCLK1=4
  • PAD=4
DIFFSTB_DIFFO_IN_USED
  • 0=4
  • OUT=4
DIFFSTB_OFF1
  • CE=4
  • CK=4
  • D=4
  • Q=4
DIFFSTB_OUTBUF
  • DIFFO_IN=4
  • OUTP=4
DIFFSTB_PAD
  • PAD=4
IBUF
  • I=13
  • PAD=13
IBUF_DELAY_ADJ_BBOX
  • IBUF_OUT=13
  • SEL_IN=13
IBUF_INBUF
  • IN=13
  • OUT=13
IBUF_PAD
  • PAD=13
IOB
  • O1=2
  • PAD=2
IOB_OUTBUF
  • IN=2
  • OUT=2
IOB_PAD
  • PAD=2
MULT18X18SIO
  • A0=3
  • A1=3
  • A10=3
  • A11=3
  • A12=3
  • A13=3
  • A14=3
  • A15=3
  • A16=3
  • A17=3
  • A2=3
  • A3=3
  • A4=3
  • A5=3
  • A6=3
  • A7=3
  • A8=3
  • A9=3
  • B0=3
  • B1=3
  • B10=3
  • B11=3
  • B12=3
  • B13=3
  • B14=3
  • B15=3
  • B16=3
  • B17=3
  • B2=3
  • B3=3
  • B4=3
  • B5=3
  • B6=3
  • B7=3
  • B8=3
  • B9=3
  • CEA=3
  • CEB=3
  • CEP=3
  • CLK=3
  • P0=3
  • P1=3
  • P10=3
  • P11=3
  • P12=3
  • P13=3
  • P14=3
  • P15=3
  • P16=2
  • P17=2
  • P18=2
  • P2=3
  • P3=3
  • P4=3
  • P5=3
  • P6=3
  • P7=3
  • P8=3
  • P9=3
  • RSTA=3
  • RSTB=3
  • RSTP=3
MULT18X18SIO_MULT18X18SIO
  • A0=3
  • A1=3
  • A10=3
  • A11=3
  • A12=3
  • A13=3
  • A14=3
  • A15=3
  • A16=3
  • A17=3
  • A2=3
  • A3=3
  • A4=3
  • A5=3
  • A6=3
  • A7=3
  • A8=3
  • A9=3
  • B0=3
  • B1=3
  • B10=3
  • B11=3
  • B12=3
  • B13=3
  • B14=3
  • B15=3
  • B16=3
  • B17=3
  • B2=3
  • B3=3
  • B4=3
  • B5=3
  • B6=3
  • B7=3
  • B8=3
  • B9=3
  • CEA=3
  • CEB=3
  • CEP=3
  • CLK=3
  • P0=3
  • P1=3
  • P10=3
  • P11=3
  • P12=3
  • P13=3
  • P14=3
  • P15=3
  • P16=2
  • P17=2
  • P18=2
  • P2=3
  • P3=3
  • P4=3
  • P5=3
  • P6=3
  • P7=3
  • P8=3
  • P9=3
  • RSTA=3
  • RSTB=3
  • RSTP=3
SLICEL
  • BX=135
  • BY=117
  • CE=286
  • CIN=130
  • CLK=320
  • COUT=137
  • F1=424
  • F2=342
  • F3=264
  • F4=161
  • F5=6
  • FXINA=3
  • FXINB=3
  • G1=420
  • G2=342
  • G3=251
  • G4=142
  • SR=24
  • X=222
  • XQ=269
  • Y=216
  • YQ=280
SLICEL_C1VDD
  • 1=19
SLICEL_C2VDD
  • 1=9
SLICEL_CYMUXF
  • 0=143
  • 1=143
  • OUT=143
  • S0=143
SLICEL_CYMUXG
  • 0=134
  • 1=137
  • OUT=137
  • S0=137
SLICEL_F
  • A1=424
  • A2=342
  • A3=264
  • A4=161
  • D=429
SLICEL_F5MUX
  • F=21
  • G=22
  • OUT=22
  • S0=22
SLICEL_F6MUX
  • 0=3
  • 1=3
  • OUT=3
  • S0=3
SLICEL_FFX
  • CE=241
  • CK=269
  • D=269
  • Q=269
  • SR=18
SLICEL_FFY
  • CE=251
  • CK=280
  • D=280
  • Q=280
  • SR=21
SLICEL_G
  • A1=420
  • A2=342
  • A3=251
  • A4=142
  • D=423
SLICEL_GAND
  • 0=1
  • 1=1
  • O=1
SLICEL_GNDF
  • 0=62
SLICEL_GNDG
  • 0=61
SLICEL_VDDF
  • 1=7
SLICEL_VDDG
  • 1=3
SLICEL_XORF
  • 0=131
  • 1=131
  • O=131
SLICEL_XORG
  • 0=122
  • 1=122
  • O=122
SLICEM
  • BX=8
  • BY=14
  • CE=11
  • CLK=14
  • F1=4
  • F2=4
  • F3=4
  • F4=4
  • G1=14
  • G2=14
  • G3=14
  • G4=14
  • SR=14
  • XQ=8
  • YQ=14
SLICEM_F
  • A1=4
  • A2=4
  • A3=4
  • A4=4
  • D=4
  • DI=4
  • WS=4
SLICEM_FFX
  • CE=5
  • CK=8
  • D=8
  • Q=8
SLICEM_FFY
  • CE=11
  • CK=14
  • D=14
  • Q=14
SLICEM_G
  • A1=14
  • A2=14
  • A3=14
  • A4=14
  • D=14
  • DI=14
  • WS=14
SLICEM_WSGEN
  • CK=14
  • WE=14
  • WSF=4
  • WSG=14
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -i -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s50a-vq100-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s50a-vq100-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
XSLTProcess 214 168 0 0 0 0 0
_impact 6 6 0 0 0 0 0
arwz 18 18 0 0 0 0 0
bitgen 149 149 0 0 0 0 0
cpldfit 220 220 0 0 0 0 0
hprep6 200 200 0 0 0 0 0
map 181 171 0 0 0 0 0
ngc2edif 1 1 0 0 0 0 0
ngdbuild 406 406 0 0 0 0 0
par 171 161 10 0 0 0 0
taengine 6 6 0 0 0 0 0
trce 161 161 0 0 0 0 0
tsim 205 205 0 0 0 0 0
xst 532 530 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/wizards/arwz/awz_db_dcmadv.htm ( 2 )
 
Project Statistics
PROPEXT_xilxSynthMaxFanout_virtex2=100000 PROP_Enable_Message_Filtering=false
PROP_FitterReportFormat=HTML PROP_LastAppliedGoal=Balanced
PROP_LastAppliedStrategy=Xilinx Default (unlocked) PROP_ManualCompileOrderImp=false
PROP_PropSpecInProjFile=Store all values PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2015-02-06T21:51:55 PROP_intWbtProjectID=1F9D9ED706FE4208B3A250E9E472992A
PROP_intWbtProjectIteration=16 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=true PROP_DevFamily=Spartan3A and Spartan3AN
PROP_DevDevice=xc3s50a PROP_DevFamilyPMName=spartan3a
PROP_DevPackage=vq100 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-4 PROP_PreferredLanguage=VHDL
FILE_UCF=1 FILE_VHDL=16
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=4 NGDBUILD_NUM_DCM_SP=2 NGDBUILD_NUM_FD=52 NGDBUILD_NUM_FDE=480
NGDBUILD_NUM_FDR=5 NGDBUILD_NUM_FDRE=32 NGDBUILD_NUM_FDSE=2 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=12 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=138 NGDBUILD_NUM_LUT1=38
NGDBUILD_NUM_LUT2=168 NGDBUILD_NUM_LUT2_D=2 NGDBUILD_NUM_LUT3=187 NGDBUILD_NUM_LUT3_D=22
NGDBUILD_NUM_LUT3_L=3 NGDBUILD_NUM_LUT4=244 NGDBUILD_NUM_LUT4_D=38 NGDBUILD_NUM_LUT4_L=20
NGDBUILD_NUM_MULT18X18SIO=3 NGDBUILD_NUM_MULT_AND=1 NGDBUILD_NUM_MUXCY=280 NGDBUILD_NUM_MUXF5=21
NGDBUILD_NUM_MUXF6=3 NGDBUILD_NUM_OBUF=2 NGDBUILD_NUM_OBUFDS=4 NGDBUILD_NUM_ODDR2=4
NGDBUILD_NUM_SRLC16E=18 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=253
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=4 NGDBUILD_NUM_DCM_SP=2 NGDBUILD_NUM_FD=52 NGDBUILD_NUM_FDE=480
NGDBUILD_NUM_FDR=5 NGDBUILD_NUM_FDRE=32 NGDBUILD_NUM_FDSE=2 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=12 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=138 NGDBUILD_NUM_LUT1=38
NGDBUILD_NUM_LUT2=168 NGDBUILD_NUM_LUT2_D=2 NGDBUILD_NUM_LUT3=187 NGDBUILD_NUM_LUT3_D=22
NGDBUILD_NUM_LUT3_L=3 NGDBUILD_NUM_LUT4=244 NGDBUILD_NUM_LUT4_D=38 NGDBUILD_NUM_LUT4_L=20
NGDBUILD_NUM_MULT18X18SIO=3 NGDBUILD_NUM_MULT_AND=1 NGDBUILD_NUM_MUXCY=280 NGDBUILD_NUM_MUXF5=21
NGDBUILD_NUM_MUXF6=3 NGDBUILD_NUM_OBUF=2 NGDBUILD_NUM_OBUFDS=4 NGDBUILD_NUM_ODDR2=4
NGDBUILD_NUM_SRLC16E=18 NGDBUILD_NUM_TS_TIMESPEC=1 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=253
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ifmt=mixed -ofn=<design_top> -ofmt=NGC
-p=xc3s50a-4-vq100 -top=<design_top> -opt_mode=Speed -opt_level=1
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -verilog2001=YES
-fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No -fsm_style=LUT
-ram_extract=Yes -ram_style=Auto -rom_extract=Yes -shreg_extract=YES
-rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES -async_to_sync=NO
-mult_style=Auto -iobuf=YES -max_fanout=100000 -bufg=24
-register_duplication=YES -register_balancing=No -optimize_primitives=NO -use_clock_enable=Yes
-use_sync_set=Yes -use_sync_reset=Yes -iob=Auto -equivalent_register_removal=YES
-slice_utilization_ratio_maxmargin=5